An automatic biasing scheme for tracing arbitrarily shaped I-V curves

Abstract

A scheme for automated tracing of arbitrarily shaped I-V curves is presented. Tracing out the I-V curves for complicated device phenomena such as breakdown in bipolar transistors and latchup in CMOS structures using conventional device simulation techniques requires a priori knowledge of the shape of the I-V curve and thus is not suitable for exploring new device phenomena. This paper presents a dynamic load-line technique which adapts the boundary conditions as the trace progresses to ensure convergence. By monitoring the slope of the curve, an optimal boundary condition is determined for each point. The boundary condition consists of a voltage source and load resistance corresponding to a load line which is orthogonal to the differential resistance at each point. This orthogonality is defined in a coordinate system scaled by the DC resistance. Step size between points is also defined by this scaling and is varied according to a smoothness criterion. The algorithm guarantees fully automatic tracing of any I-V curve without prior knowledge of the curve's characteristics. Its implementation is completely external to the device simulator, i.e., it simply sets up the boundary conditions to be used by the simulator. Curve tracing examples which validate the algorithm are discussed. >