Abstract

We present a distributed algorithm for automatic test generation for sequential circuits. Our system uses a network of workstations by partitioning the fault list. Multiple test generation processes are run on separate processors. Unlike a prior implementation, the communication of detected faults among processors is asynchronous, with all computers processing and broadcasting detected faults without synchronization. We thus accomplish a reduction in duplicated computation and a general improvement in the speedup as compared to the synchronized parallelization. Experimental results demonstrate superlinear speedups for some of the benchmark circuits. A mathematical model is presented to explain the speedups.

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