An asymmetrical multilevel inverter with minimum number of switches for 1-φ grid-connected applications

Abstract

This paper proposes a novel 1-φ asymmetrical multilevel inverter (MLI) topology. The proposed MLI topology can provide seventeen voltage levels in the output with less number of power components. This seventeen level inverter (SLI) consists of eleven power switches and two sets of unequal dc sources (two V and two 3V). The seventeen voltage levels are generated through various possible combinations of four input dc sources through the power switches. Another important feature of this SLI topology is that maximum four switches conduct in any mode, which results in reduced conduction losses thus improving the efficiency of the system. A comparison of the SLI with existing MLI topologies shows that the number of required power components is significantly lower. The 3-φ extension of the proposed SLI is discussed. Further, the extended version of 1-φ SLI to n-level MLI is also discussed. A modulation strategy is proposed to control the output of the 1-φ SLI. To validate the SLI, simulations are carried out in Matlab-Simulink for the 2kw power rating grid connected system. This SLI feeds high quality power into the grid with a THD of 2.36%.