Abstract
In this paper, we present an area-efficient noise-optimized programmable 4 × 25-to-28.9 Gb/s optical receiver. Both high- and low-power modes are available for the receiver to meet different requirements. Emitter degeneration provides the input transimpedance amplifier (TIA) stage with improved stability. The noise of the TIA with emitter degeneration is analyzed, and an improved noise optimization method for the TIA is proposed. A sink current source with emitter degeneration in a DC offset cancellation (DCOC) loop reduces the noise introduced by the DCOC circuit. Moreover, with parasitic capacitor utilization in the DCOC loop and capacitive emitter degeneration in the variable-gain amplifier (VGA) stage, the chip area is minimized. Fabricated in a 0.13 µm SiGe BiCMOS technology, the receiver achieved a small area of 0.54 mm2 per lane. The measured bit error rate (BER) is 10−12 with input signal varying from 110 μApp to 1150 μApp. The one-lane power dissipation values in the low-power and high-power modes are 84.97 mW and 123.75 mW, respectively.
Highlights
The exponential growth of data traffic has created higher data rate requirements for electronic components [1]
Several multilane optical receivers with high-speed data rates and noise optimization have been developed [5,6,7,8,9,10,11] in CMOS and SiGe BiCMOS technology
In order to explore performance enhancement of the optical receivers, a wide-band design of the receivers was analyzed by Kokolov, A.A. [12] in 2019, a noise optimization method was proposed by Li, D. [9] in 2016, and power and area reductions in advanced CMOS technology were made by Shahramian, S. [13] in 2019
Summary
The exponential growth of data traffic has created higher data rate requirements for electronic components [1]. Several multilane optical receivers with high-speed data rates and noise optimization have been developed [5,6,7,8,9,10,11] in CMOS and SiGe BiCMOS technology. A multilane optical receiver with data rates exceeding hundreds of Gb/s was first functionally realized by Shibasaki, T. 2020, paper, 9, 1032 we present an area-efficient noise-optimized programmable 4 × 25-to-28.92 Gb/s of 15 optical receiver for a multilane optical fiber system in 0.13 μm SiGe BiCMOS. A noise model of the input stage with emitter degeneration is analyzed.
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