An area efficient Error correction codes to protect against stuck-at defects and soft errors

Abstract

To protect memories from soft errors and stuck-at defects, the Error correction codes (ECCs) are used. Single error correction (SEC) codes that can correct 1-bit error per word are a typical choice for memory protection. In some occasions, SEC codes are extended to conjointly offer double error detection are referred to as SEC-DED codes. Recently, some proposals are created to use error correction codes to handle with defects. The utilization of an error correction code impacts the circuit design in terms of area. In this paper tend to correct two single bit errors within the combination of one soft error and one stuck-at defect and also minimizing the number of ones in generator matrix and parity check matrix of SEC-DED codes, to reduce the area introduced by error correction codes.