An Approximation of the Pull-Out Frequency Parameter in a Second-Order PLL

Abstract

Consider a phase-lock loop (PLL) that is phase locked to a constant frequency reference. Under this condition, the PLL pull-out frequency is defined as the largest input reference frequency step that can be applied without the PLL slipping one or more cycles. The application of an input reference frequency step larger (alternatively, smaller) than the pull-out frequency will (alternatively, will not) cause the loop to break frequency lock and slip one or more cycles. In general, due to the complex nonlinear nature of the dynamics involved, the PLL pull-out frequency can only be approximated. For the second-order PLL containing a proportional-plus-integral loop filter and sinusoidal phase detector, only simulation results have been published, and a formula useful for approximating the pull-out frequency has been curve fitted to these results (an approximation to the pull-out frequency has not been derived analytically). In what follows, an approximation is derived to the pull-out frequency for the above-mentioned PLL. First, with the aid of a phase plane, the pull-out frequency is related to a phase plane separatrix. Next, an asymptotic approximation is developed for this separatrix. This is used in an integral of the nonlinear PLL equation to develop an approximation to the pullout frequency. The analytical results are shown to compare very favorably with numerical simulations.