Abstract
Electrolytic capacitors used in adjustable speed drives (ASDs) are affected more by low-frequency currents than high frequency. It is shown in this article that even-ordered harmonics in the supply voltage create a 150 Hz current component in the dc bus, and impact the heating in the capacitor. It is further shown that the total harmonic distortion of the current drawn by the ASD is adversely affected due to the even-ordered harmonics. This article discusses a cost-effective approach based on suitable triggering of the silicon controlled rectifiers (SCRs) in the bridge of ASD to suppress the effect of even-ordered harmonics on capacitor ripple current and source current. Using parameters taken from capacitor datasheets, and the supply voltage characteristics from field studies, exhaustive simulation studies are presented to identify an approach to the determination of various thresholds required. The applicability of the method to the ASDs of various power levels is also presented. The proposed strategy is analyzed by simulations under different grid impedance and harmonic combination cases and validated by a hardware test setup.
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