An application specific integrated circuit for optimization of fixed polarity reed-muller expressions

Abstract

EXOR-based logic circuits have become more popular than AND-OR circuits because they have some specific advantages over AND-OR realizations. Two-level AND-EXOR logic is one of the EXOR-based logics, which is also known as Reed-Muller logic. A Fixed Polarity Reed-Muller (FPRM) expression is one of the seven classes of AND-EXOR logic expressions. An FPRM expression is canonical and uses a fixed polarity for each variable. An n-variable function has 2 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">n</sup> different polarity vectors; consequently, there are 2 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">n</sup> different FPRM expressions. The expression with minimum number of products is the minimum FPRM expression. Therefore, the minimization problem of FPRM expressions is to find a polarity vector that produces an FPRM expression with minimum number of products. There are many software methods for FPRM minimization which are sequential in nature and require exponential execution time. In this work an ASIC has been developed to minimize 3-variable FPRM expressions which is parallel in nature and requires constant time. This ASIC takes the minterm coefficients of a Boolean function as input. It generates all the polarity vectors for a three variable function and determines the optimum polarity and corresponding FPRM coefficients.