An application-specific image processing array based on WSe2 transistors with electrically switchable logic functions

Senfeng Zeng,Zhaowu Tang,Chunsen Liu,Xiaohe Huang,Peng Zhou,Liwei Liu

doi:10.1038/s41467-021-27644-3

Senfeng Zeng, Zhaowu Tang + Show 4 more

Open Access

https://doi.org/10.1038/s41467-021-27644-3

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Abstract

With the rapid development of artificial intelligence, parallel image processing is becoming an increasingly important ability of computing hardware. To meet the requirements of various image processing tasks, the basic pixel processing unit contains multiple functional logic gates and a multiplexer, which leads to notable circuit redundancy. The pixel processing unit retains a large optimizing space to solve the area redundancy issues in parallel computing. Here, we demonstrate a pixel processing unit based on a single WSe2 transistor that has multiple logic functions (AND and XNOR) that are electrically switchable. We further integrate these pixel processing units into a low transistor-consumption image processing array, where both image intersection and image comparison tasks can be performed. Owing to the same image processing power, the consumption of transistors in our image processing unit is less than 16% of traditional circuits.

Highlights

With the rapid development of artificial intelligence, parallel image processing is becoming an increasingly important ability of computing hardware
According to different computing tasks, different function modules need to be involved in each unit; for example, the logic AND function is applied to find the intersection of images, while the logic XNOR function is applied to compare the similarity of images
The existing technical path has a very high area redundancy because each functional module of the pixel processing unit is physically implemented by different circuits and the function selection depends on additional control circuits

Summary

Introduction

With the rapid development of artificial intelligence, parallel image processing is becoming an increasingly important ability of computing hardware. Through drain voltage regulation on the carrier injection barrier, the logic function is switchable between AND and XNOR in a single transistor without additional terminal or multiplexer circuits, which means that the single device is qualified to the pixel processing unit. This single transistor pixel processing unit greatly decreases the consumption of transistors in logic circuits (1 transistor implements logic AND and XNOR) compared to the NMOS logic family (2 transistors for logic AND, 8 transistors for logic XNOR, and additional multiplexer circuits) Assembling these WSe2 pixel processing units into an array, the image processing array can handle different graphic processing tasks, such as finding the intersection or similarity of images. At the same processing power, the transistor consumption of our image processing array is

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