An Analytical Model for Distributed Capacitance in Up–Down Series Stacked Inductors

Abstract

Up–down series stacked inductors (UDSSIs) are known to have higher self-resonant frequency (SRF) when compared to standard series stacked inductors (SSSIs). In this article, a physics-based distributed capacitance model is presented to accurately estimate the interlayer parasitic capacitance in both these configurations. Based on our analytical formulations, it is revealed that the total capacitance reduces substantially with increasing spiral turns in UDSSI, which is in turn responsible for increased SRF and inductor figure of merit (FOM). The importance of substrate resistivity and interlayer dielectric thickness in further improved inductor FOM with UDSSI configuration is also demonstrated. Prototype inductors using SSSI and UDSSI configurations are fabricated in 0.35- $\mu \text{m}$ BiCMOS technology. The measured results showed a 70% improvement in SRF with UDSSI structure while achieving inductance, quality factor, and FOM values of 31.54 nH, 12.34, and 4.4, respectively.