An analytical model for delay and crosstalk estimation with application to decoupling

Abstract

The impact of interconnect coupling, in the form of delay and crosstalk, in deep submicron integrated circuit design is increasing. In many cases, especially in routing, the coupling capacitance, C/sub c/, between adjacent lines is decoupled and replaced by 2C/sub c/ connected to ground for fast worst-case delay estimation. This is based on the assumption that worst-case delay occurs when two adjacent lines switch simultaneously in opposite directions so that the voltage change across the coupling capacitance is twice that when only one line is switching. Similarly, when two adjacent lines switch simultaneously in the same direction, the coupling capacitance is put to zero based on the fact that the voltage difference across it is zero. However, we show that by replacing the coupling capacitance C/sub c/ with a grounded capacitance of 2C/sub c/ (or by zero) when signals switch simultaneously in opposite (or same) directions may overestimate or even underestimate the actual delay. The variable strengths of the drivers driving the coupled lines bring in an additional level of complexity to the delay estimation when coupling exists. In this paper, we derive a simple analytical model that takes the effect of different driver strengths into account, to accurately estimate the delay and crosstalk of two coupled interconnect lines switching simultaneously. This approach also gives the exact values of the multiplicants that C/sub c/ should be multiplied with, if the lines are to be decoupled, for both worst-case and best-case delay computation; that is when the signals switch in opposite direction and when they switch in the same direction.