An analysis of the eddy effect in through-silicon vias based on Cu and CNT bundles: the impact on crosstalk and power

Abstract

The performance of three-dimensional integrated circuits primarily depends on the filler material used in the through-silicon vias (TSVs). The most widely used filler material is Cu, but it faces severe reliability issues due to the skin effect and problems related to electromigration at high frequencies. Therefore, single- and multiwalled carbon nanotube (SWCNT and MWCNT) bundles have recently emerged as suitable filler materials for TSVs. Additionally, at high frequencies, electromagnetic forces induce eddy currents that adversely affect the overall performance of TSVs. This paper demonstrates for the first time the impact of eddy currents on TSVs based on Cu as well as SWCNT and MWCNT bundles. An accurate RLGC circuit model is proposed by considering the eddy effect at the depletion layer, neighboring TSVs and in the silicon substrate region. The resulting closed-form expressions for the TSV parasitic parameters are verified against previous experimental data obtained at an operating frequency of 2 GHz. Good agreement between the experimental and analytical data for the resistance and inductance is observed, revealing a difference of approximately 8.02% and 4.95%, respectively. The equivalent circuit parameters are modeled at the 7-nm technology node using a three-line driver-via-load setup. For the proposed setup, the crosstalk-induced delay, the peak noise voltage, and the power dissipation are analyzed with and without consideration of the eddy effect. Irrespective of the TSV height, the MWCNT bundle design demonstrates substantially lower crosstalk delay, peak noise, and power dissipation in comparison with the TSVs based on Cu or SWCNT bundles. The overall difference when including the eddy effect is approximately 16.55%, 2.45%, and 0.27% for the crosstalk delay, noise voltage, and power dissipation, respectively. Furthermore, to demonstrate the complexity of the model at smaller technology nodes, a comprehensive study is performed at the 5-nm and 7-nm technology nodes. It is observed that the delay without the eddy effect at the 5-nm technology node is higher on average by 3.4-fold for Cu, whereas for the TSVs based on MWCNT bundles it is only 2.6-fold higher.