An analog random access memory in the AVLSI-RA process for an interpolating pad chamber

Abstract

An analog memory for an interpolating pad chamber has been designed at Oak Ridge National Laboratory and fabricated by Harris Semiconductor in the AVLSI-RA CMOS process. The goal was to develop a rad-hard analog pipeline that would deliver approximately 9-b performance, a readout settling time of 500 ns following read enable, an input and output dynamic range of +/- 2.25 V, a corrected RMS pedestal of approximately 5 mV or less, and a power dissipation of less than 10 mW/channel. The pre- and post-radiation measurements to 5 MRad are presented.