An analog front-end chip set employing an electro-optical mixed design on SPICE for 5-Gb/s/ch parallel optical interconnection

Abstract

A chip set composed of a laser-diode driver (LDD) and an optical receiver (RCV), which incorporates a full 2D (reshape, regenerate) function, has been developed by using silicon bipolar technology for a four-channel 5-Gb/s parallel optical transceiver. An electro-optical mixed design on SPICE of the LDD and the LD is accomplished by describing the rate equations of the LD as an electrical circuit. This design accommodates easy connectivity of the LDD chip to the LD in the optical transmitter module without the need for adjustment of the optical waveform. A pseudobalanced transimpedance amplifier (TIA) and feedforward automatic decision threshold control (ATC) in the RCV minimize the number of off-chip bypass capacitors, eliminate the need for any off-chip coupling capacitors, and keep crosstalk less than -50 dB and low cutoff frequency less than 80 kHz. A prototype parallel optical transmitter module and a prototype receiver module, based on the chip set, demonstrated asynchronous four-channel 5-Gb/s operation. The chip set has a throughput of 20 Gb/s with a power dissipation of 1.3 W at a 3.3-V supply.