An Alternative Mapping of 3-D Space onto Processor Arrays

Abstract

Algorithms for many geometric and physical algorithms rely on a decomposition of 3-D space. Typically, a cubical decomposition is used, where each cubical cell is adjacent to, and may interact with, as many as 26 neighboring cells. In this paper, we explore an alternate structure, the woven mesh, that arises from a decomposition based on truncated octahedra. An algorithm is given to map 3-D space into the cells of the woven mesh and we give mappings which exploit the lower degree of the woven mesh, 14 rather than 26, to obtain better embeddings of 3-D space onto low degree processor arrays. We show that the woven mesh can be embedded with dilation 2 and congestion 4 onto a 3-D mesh. A dilation 3, congestion 8 embedding onto a 4-regular graph is also presented. These embeddings achieve optimal dilation on their respective host graphs; we prove that there does not exist a dilation 2 embedding of the woven mesh on any 4-regular graph. Of particular interest is the proof technique which was guided by deductive computation.