An adjustable accuracy model for VLSI analog circuits using lookup tables

Abstract

The successful design of analog VLSI circuits requires both a precise and computationally efficient device model. An accuracy adjustable table look-up modeling methodology, using a multidimensional gradient data tracing methodology and an interpolation technique with monotonicity, has been developed for analog circuit simulation. Using this technique, several table models with different accuracies have been compiled and utilized to simulate analog circuits such as a CMOS push-pull inverter and cascode opamp with a regulated current sink without loss of computational efficiency. This accuracy adjustable modeling approach has the ability to compromise between table size (speed) and model accuracy. Model accuracy can be emphasized in a specific device operation range where accuracy is critical to circuit performance by utilizing an accuracy partitioning methodology. A generic modeling methodology has been successfully generalized with dependent and independent variables applicable to several technologies, including CMOS, bipolar, and GaAs technologies. Simulation results from table models compiled by this new approach are not only more accurate but also more computationally efficient (faster) than conventional device models such as SPICE level 2 and BSIM models.