An Active Gate Driver Design to Reduce Voltage and Current Overshoots for SiC MOSFET Modules

Abstract

SiC devices have fast switching speeds and are highly sensitive to parasitic parameters in the circuit. Voltage and current overshoots and oscillations are generated due to high dv/dt and di/dt. Switching performances and the safety working margin of SiC devices are affected. In this paper, voltage and current overshoots during the switching process are modeled and analyzed considering parasitic parameters in the circuit. An active gate driver (AGD) is employed to suppress the overshoots. A current source branch with passive components is added to the gate node. Turn-on and turn-off switching processes are optimized by adjusting the gate driving currents. Voltage and current overshoots are reduced accordingly. A simulation model is built to verify feasibility of the proposed AGD method. Various passive components in the additional branch are added and switching performances are compared. Simulation results show that the proposed AGD method is able to optimize the switching process and reduce additional switching losses.