Abstract
In Part I, an accurate - measurement based on time-domain reflectometry (TDR) for MOS capacitors in the presence of a high level of leakage across the gate dielectric was presented. This new method is expected to have high accuracy even in the presence of a very high level of leakage current. In this paper, the basic TCR-based - measurement is extended to handle the parasitic, allowing the overlap capacitance to be extracted simultaneously and accurately without the need for additional measurement. In addition, a detailed error analysis is provided to complete the description of the TDR - measurement method.
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