Abstract

Purpose – One of the main issues which microelectronics industry encounter is reliability as feature sizes scale down to nano-design level. The purpose of this paper is to provide a probabilistic transfer matrix based to find the accurate and efficient method of finding circuit’s reliability. Design/methodology/approach – The proposed method provides a probabilistic description of faulty behavior and is well-suited to reliability and error susceptibility calculations. The proposed method offers accurate circuit reliability calculations in the presence of reconvergent fanout. Furthermore, a binary probability matrix is used to not only resolve signals correlation problem but also improve the accuracy of the obtained reliability in the presence of reconverging signals. Findings – The results provide the accuracy and computation time of reliability evaluation for ISCAS85 benchmark schemes. Also, simulations have been conducted on some digital circuits involving LGSynth’91 circuits. Simulation results show that proposed solution is a fast method with less complexity and gives an accurate reliability value in comparison with other methods. Originality/value – The proposed method is the only scheme giving the low calculation time with high accuracy compared to other schemes. The library-based method also is able to evaluate the reliability of every scheme independent from its circuit topology. The comparison exhibits that a designer can save its evaluation time in terms of performance and complexity.

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