Abstract
An 8-bit, 16 input, switched-capacitor dot product circuit in 28-nm FDSOI CMOS is presented. The design uses sixteen 8-bit passive charge redistribution digital-to-analog multipliers followed by an 8-bit SAR ADC. Measured energy per dot product operation is 3.2 pJ. When used to compute partial dot products for the hidden layer of a three-layer neural network, the design achieves a classification accuracy of 98.0% on the MNIST handwritten digit dataset.
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