An 8 bits, RF UHF-Band DAC based on interleaved bandpass delta sigma modulator assisted by background digital calibration

Abstract

A multimode 8 to 4 bits delta sigma digital-to-analog converter (DAC) comprises a digital band-pass time interleaved delta sigma modulator (BP-TIDSM) with 2 interleaved channels in 5 frequency modes accompanied by a 4-bit analog DAC with a large SVR bandgap presented. As this interleaved modulator operates in narrow frequency channels around Fs/5, it leads to a low DCE design and there is no severe compulsion to calibrate which it leads to save power, area and hardware. Fully digital modulator design is modelled in MATLAB®/SIMULINK® and results in SNDR = 57 dB in 380, 420, 440, 460 MHz and 55 dB in 400 MHz with 1v supply voltage. In order to verify the results, this BP-TIDSM is synthesized by a behavioral VHDL code in ISE software and also Design compiler. Results are shown and compared in both MATLAB and ISE software. After noise shaping through the modulation and before multiplexing, a digital background calibration by a digital FIR filter applied to the modulator and all of them implemented by Cadence Virtuoso tool. A 4-bit analog DAC assigned to the multiplexer output to deliver a smooth analog signal. BP-TIDSM and calibration filters and also DAC circuits are implemented using Cadence in 180 nm technology. The proposed design used 52 mW of power with 1.6v output voltage swing and occupied an area of 0.121 mm2.