An 8-Bit Full-Adder Implementation Using Single Electron Tunneling (SET) Technology (Dept.E)

Abstract

Single Electron Tunneling (SET) devices have come to be considered as promising candidates for future ultra-low power and high-density integrated circuits. Their potential for ultra-low power is related to that the operation is based on only a few electrons. The term Single Electron Tunneling (SET) technology has been selected for devices sensitive to the manipulation of a single electron even if the device itself requires in fact few electrons. Besides, SET provides a simple and elegant solution for implementing threshold Logic Gates (TLGs). This paper presents a SET TLG one-bit full-adder implemented in SET technology. The paper then introduces the design and implementation of an 8-bit SET TLG full-adder and presents its SIMON 2 simulation results.