An 8-bit 50-MHz CMOS subranging A/D converter with pipelined wide-band S/H

Abstract

An 8-b video-rate subranging analog-to-digital (A/D) converter with pipelined wideband sample-and-hold (S/H) amplifiers is described. The chip architecture is based on a newly developed subranging technique that combines a digital-to-analog subconverter and a subtractor in one body. The development of a bandwidth enhancement technique for the S/H amplifier yields a wide effective resolution bandwidth using 1- mu m CMOS technology. An effective resolution bandwidth of 25 MHz was achieved, as well as a small input capacitance of 1.5 pF, due to the high performance of the S/H circuit developed.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>