Abstract
An 8-bit resolution ultrahigh-speed monolithic digital-to-analog converter (DAC) is fabricated using super self-aligned process technology. In order to improve dynamic accuracy, which is determined by settling speed, clock feedthrough noise, and glitch, a number of circuit technologies are developed including a rise- and fall-time control switch driver, a low-noise flip-flop, and a differential buffer configuration. In addition, a chip assembly technology using a multilayer ceramic substrate is developed. The DAC exhibits a settling time to 8-bit accuracy of about 2 ns, a maximum conversion rate of 1 GHz, a glitch energy of 2 ps-V, and a 10-bit linearity error accuracy without trimming.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">></ETX>
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