An 11 V-tolerant, high-density neurostimulator using time-domain calibration in 65 nm CMOS

Abstract

Safe neurostimulation requires accurate charge balancing of the stimulation waveform to avoid charge build-up on the electrode-tissue interface. This work presents a novel time-domain calibration scheme to reduce the on-chip area per channel: control in the amplitude domain is loosened in exchange for corrections in the time domain, relieving analog matching constraints. A 16-channel stimulator was implemented in 65 nm CMOS to validate the principle, requiring only 0.0141 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> area/channel. Despite being implemented in a standard CMOS technology, 10.4 V compliance has been achieved for compatibility with high-impedant microelectrode arrays typical for high-resolution neurostimulators. Measurements after calibration show the DC error is successfully reduced below 60 nA on every channel. Static power consumption is 22.4 µW per channel.