Abstract

Through-silicon-vias (TSVs) are the enabling technique for three-dimensional integrated circuits (3D ICs). However, their large area significantly reduces the benefits that can be obtained by 3D ICs. On the other hand, a major limiting factor for the implementation of many on-chip circuits such as DC-DC converters and resonant clocking is the large area overhead induced by spiral inductors. Several works have been proposed in the literature to make inductors out of idle TSVs. In this paper, we will demonstrate the effectiveness of such TSV inductors in addressing both challenges. Experimental results show that by replacing conventional spiral inductors with TSV inductors, the inductor area can be reduced by up to 4.3x and 7.7x for a single-phase buck converter design and an LC resonant clocking design respectively, under the same performance constraints.

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