AMPLIFIER GAIN PER STAGE UP TO 0.5 THz USING 35 NM InP HEMT TRANSISTORS

Abstract

Pivotal in the design of circuits is the ability to efficiently translate available transistor gain to high gain per stage. Remarkably, for 35-nm InP HEMT transistors, the efficiency of this translation remains high even up to ~0.5 THz. The ever shrinking wavelength correlated with higher frequencies necessitates a scaling of not only the device layout, but also of the passive elements and wafer thickness. Furthermore, to avoid distributed effects, the length of transistor gate fingers must be reduced.