Always-On Sub-Microwatt Spiking Neural Network Based on Spike-Driven Clock- and Power-Gating for an Ultra-Low-Power Intelligent Device

Pavan Kumar Chundi,Sangjoon Kim,Joonsung Kang,Dewei Wang,Joao Pedro Cerqueira,Mingoo Seok,Sung Justin Kim,Seungchul Jung,Minhao Yang

doi:10.3389/fnins.2021.684113

Pavan Kumar Chundi, Sangjoon Kim + Show 7 more

Open Access

https://doi.org/10.3389/fnins.2021.684113

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Abstract

This paper presents a novel spiking neural network (SNN) classifier architecture for enabling always-on artificial intelligent (AI) functions, such as keyword spotting (KWS) and visual wake-up, in ultra-low-power internet-of-things (IoT) devices. Such always-on hardware tends to dominate the power efficiency of an IoT device and therefore it is paramount to minimize its power dissipation. A key observation is that the input signal to always-on hardware is typically sparse in time. This is a great opportunity that a SNN classifier can leverage because the switching activity and the power consumption of SNN hardware can scale with spike rate. To leverage this scalability, the proposed SNN classifier architecture employs event-driven architecture, especially fine-grained clock generation and gating and fine-grained power gating, to obtain very low static power dissipation. The prototype is fabricated in 65 nm CMOS and occupies an area of 1.99 mm2. At 0.52 V supply voltage, it consumes 75 nW at no input activity and less than 300 nW at 100% input activity. It still maintains competitive inference accuracy for KWS and other always-on classification workloads. The prototype achieved a power consumption reduction of over three orders of magnitude compared to the state-of-the-art for SNN hardware and of about 2.3X compared to the state-of-the-art KWS hardware.

Highlights

An spiking neural network (SNN) classifier is an attractive option for ultra-low-power intelligent internet-of-things (IoT) devices
In CerebelluMorphic (Yang et al, 2021b) they simulated portions of the cerebellum related to motor learning using 6 field programmable gate array (FPGA) chips that communicate using a multicast router
The SNN chip dissipates a power of 75 nW when there is no input and power of 220 nW when running a keyword spotting (KWS) dataset at a supply of 0.52 V

Summary

Introduction

An spiking neural network (SNN) classifier is an attractive option for ultra-low-power intelligent internet-of-things (IoT) devices. Spiking neural network based hardware work so far, focused on either the acceleration of neural simulations or the improvement of both performance and energy efficiency In other words, they are not designed for always-on function. Chen et al (2018) presented an SNN accelerator with on-chip spike-timing-dependent plasticity (STDP) based learning This chip has 64 cores that communicate using a network-on-chip (NoC) with each core supporting 64 leaky integrate and fire (LIF) neurons. Park et al (2019), developed a new neuromorphic training algorithm and hardware which supports low overhead on-chip learning Some of these chips e.g., (Akopyan et al, 2015; Davies et al, 2018) employ asynchronous logic such as quasi-delay-insensitive (QDI) dual-rail dynamic logic or bundled data communication. They exhibit a power consumption of more than tens of mW, which makes it difficult to use them for alwayson functions

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