Abstract
This paper discusses the challenges and solutions for reliability allocation analysis. The sophistication of today's designs requires a re-evaluation of reliability allocation methodologies to account for complex system designs where a single board could have lots of powerful ICs such as ASICs, FPGAs, Processors, etc. how should the overall system reliability target be divided into various elements? As part of early engagement between reliability and design Engineers, reliability requirements are discussed which includes the design reliability allocation. The design team uses this data as a guideline to ensure the design will meet the required reliability and availability requirements. As product and circuit designs are becoming more and more complex, the ability to set the reliability and availability targets for each element of the system becomes more challenging as well. Products are no longer hardware only; the majority of functions are driven by software. As product features and functions are constantly increasing, the demand for complex integrated circuits is increasing as well. There are a number of component types such as ASICs, FPGAs, DSPs, Mirco-controller / processors and memories are susceptible to soft errors. Therefore, there is a need to connect this phenomenon to physical hardware and software failures to accurately define the required reliability and availability targets for the system components. The goal of this paper is to discuss the current methods of allocating reliability targets for system elements and highlight the shortcomings of the current methodologies. In addition, it will provide the best practices and methods to allocate / divide system reliability requirements by individual elements and takes various types failures such as hardware, software and soft errors into account.
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