Alleviation of Short Channel Effects in Ge Negative Capacitance pFinFETs

Abstract

In order to overcome the Boltzmann's tyranny, where subthreshold slope (SS) of a MOSFET is limited at a minimum of 60 mV/dec at room temperature, various device schemes utilizing different current transport mechanisms and novel materials were studied extensively [1], [2]. Among these candidates, incorporation of ferroelectric (FE) oxides along with capacitance-matched gate stacks helped realize the hysteresis-free negative capacitance (NC) FETs with bi-directional sub-60mV/dec SS [3], [4]. It has been discussed that these NCFETs not only give reduced SS but also show negative DIBL due to its nature of NC [5]. This could possibly lead to higher tolerance towards the conventional short channel effects (SCEs) such as steep increase in SS, DIBL and V T roll-off with scaling of channel length. However, such robustness to SCEs has not been carefully studied in the state-of-the-art Germanium NCFETs. In this paper, more than hundreds of devices were carefully measured with respect to channel length and device parameters were extracted so that such properties could be seen more explicitly. The NCFETs' parameters (SS, DIBL, VT) were compared directly with our reported Ge pFinFETs with conventional high-k dielectric [6] to graphically show the advantage of NC Ge FinFETs over the conventional Ge FinFETs.