Abstract

In this letter, all optical logic gates (OR, XOR, and NOT), based on hybrid metal insulator metal (HMIM) plasmonic waveguide (Ag-SiO2-Si-SiO2-Ag) have been proposed and designed in the confinement area of $0.25\times 0.04\,\,\mu \text{m}^{2}$ at $1.55~\mu \text{m}$ operating wavelength. The proposed logic gates work on principle of linear interference, are designed using Y-splitter. OR and XOR logic gates are designed in footprint area of 17.12 and $19.6~\mu \text{m}^{2}$ , respectively, which is several times miniaturized compared to previous reports. Moreover an intensity contrast ratio of 26 dB has been achieved between ON and OFF states for XOR and NOT logic gates, which is 3 to 4 fold enhanced compared with previous literature. This study opens a new avenue for designing of chip scale plasmonic integrated circuits.

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