All Current Mode RF Receiver Front End

Abstract

In this paper, an all current mode RF receiver of direct conversion for 802.11b WLAN has been proposed. The front end of this receiver, containing a current mode LNA plus mixer (CLPM) circuit and a current mode quadrature ring oscillator (CQRO), has been designed and simulated in chartered 0.18 μm CMOS process. The proposed method features that the pseudo-cascode current mirrors of the current mode LNA have not been implemented in cascade, so we can decrease the supply voltage and increase the output impedance by adding a common-gate transistor. The current mode mixer has been composed by the four added common-gate transistors; this implementation makes the current mode mixer a two-layer structure that reduces the supply voltage. The current mode quadrature oscillator is a four current mode stage ring oscillator employing feed forward paths. The CLPM has a measured power conversion gain of 18.6 dB, an input referred third-order intercept point (IIP3) of −0.53 dBm. The total noise figure is 3.9 dB and the power is only 15 mW by post-simulations. The CQRO core current consumption is 24 mA with a 1 V supply. The phase noise results in −121.61, −148 dBc/Hz at 1 MHz, and 10 MHz from the carrier, respectively.