All-2D ReS2 transistors with split gates for logic circuitry

Junyoung Kwon,Yongjun Shin,Chul-Ho Lee,Hyeokjae Kwon,Hyunik Park,Takashi Taniguchi,Gwan-Hyoung Lee,Jae Yoon Lee,Kenji Watanabe,Seongil Im,Jihyun Kim

doi:10.1038/s41598-019-46730-7

Abstract

Two-dimensional (2D) semiconductors, such as transition metal dichalcogenides (TMDs) and black phosphorus, are the most promising channel materials for future electronics because of their unique electrical properties. Even though a number of 2D-materials-based logic devices have been demonstrated to date, most of them are a combination of more than two unit devices. If logic devices can be realized in a single channel, it would be advantageous for higher integration and functionality. In this study we report high-performance van der Waals heterostructure (vdW) ReS2 transistors with graphene electrodes on atomically flat hBN, and demonstrate a NAND gate comprising a single ReS2 transistor with split gates. Highly sensitive electrostatic doping of ReS2 enables fabrication of gate-tunable NAND logic gates, which cannot be achieved in bulk semiconductor materials because of the absence of gate tunability. The vdW heterostructure NAND gate comprising a single transistor paves a novel way to realize “all-2D” circuitry for flexible and transparent electronic applications.

Highlights

Ultrathin two-dimensional (2D) semiconducting materials are useful for a number of electronic applications because of their unique properties originating from their atomically thin nature[1,2,3,4,5]
The ReS2 channel was placed on the hexagonal boron nitride (hBN) to reduce scattering from charged impurities of the substrate and interfacial impurities
The high field effect mobility of 35 cm2/V·s and high on-off ratio of 106 were obtained by suppression of Fermi level pinning at the graphene-ReS2 junction and reduction of charged impurity scattering

Summary

Introduction

Ultrathin two-dimensional (2D) semiconducting materials are useful for a number of electronic applications because of their unique properties originating from their atomically thin nature[1,2,3,4,5]. It has been anticipated that a scale-down limit can be overcome by 2D semiconductors for higher integration of electronic devices. In this regard, “all-2D” devices comprising only 2D materials, i.e., van der Waals heterostructure (vdW) devices, have been demonstrated[8,9,10,11]. Significant contact resistance between deposited metal and 2D semiconducting channels severely deteriorates device performance due to the Fermi level pinning at the interface[20], which makes it difficult to utilize the 2D semiconductors for practical applications required by the industry. By locally tuning the Fermi level of a 2D channel, a multi-functional logic device can be realized in one 2D channel

Methods

Results

Conclusion