Abstract
Method of cubic covering building for structurally-functional models of digital devices based on /spl pi/-algorithm is offered. It allows to create cubic coverings and to generate tests for all stuck-at faults of essential circuit lines, where circuits are represented in form of Boolean equations. Object of diagnosis is flip-flop structures represented in form of structural and functional description (Boolean equations in BNF format which is a subset of VHDL and Verilog languages). Mathematical apparatus for representation of object of algorithm is offered.
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