Al2O3 Insertion Layer for Improved PEALD SiO2/(Al)GaN Interfaces

Abstract

The development of high‐quality gate dielectric/III‐N semiconductor interfaces is indispensable to achieve high performance GaN‐based high electron mobility transistors (HEMTs). In this work, we present improved interfaces between SiO2 and GaN (or AlGaN) with Al2O3 insertion layer deposited by plasma‐enhanced atomic layer deposition (PEALD). Interface state density (Dit) and border trap density (Nbt) were characterized using UV‐assisted C–V measurement on metal‐oxide‐semiconductor capacitors (MOSCAPs). SiO2 with Al2O3 insertion layer exhibited integrated Dit of 1.93 × 1011 cm−2, one order of magnitude lower than that without Al2O3 insertion layer. Nbt of SiO2 with Al2O3 insertion layer is nearly twice of that without Al2O3 insertion layer. Stressed C–V measurement further confirmed improved interface with Al2O3 insertion layer. To investigate the performance of MOS‐HEMT using SiO2 with Al2O3 insertion layer as a gate dielectric, pulsed IDS–VGS measurements were performed. MOS‐HEMT exhibited positive threshold voltage shift, which is attributed to electron trapping in interface states and border traps.