Airgap Insertion and Layer Reassignment Under Setup and Hold Timing Constraints

Abstract

Airgap formed in intermetal dielectric (IMD) reduces coupling capacitance, and thus can be utilized for timing optimization. Metal layers with airgap are limited due to high cost of airgap formation. Layer reassignment is to relocate some timing critical wires in nonairgap layers to airgap layers while noncritical wires in airgap layers are reassigned to nonairgap layers. Airgap insertion is to determine the amount of airgaps that are inserted for each critical wires in airgap layers. The two problems are solved in unified fashion with a goal of maximizing setup total negative slack (TNS) while satisfying hold constraints and design rules. They can be formulated as mixed-integer quadratically constrained programming (MIQCP). So, for practical application, a heuristic algorithm is presented and is experimentally compared to MIQCP with small examples. The experiments demonstrate that setup TNS and setup worst negative slack (WNS) are improved by 37% and 8%, respectively; they are improved by 26% and 5% with a simple-minded approach. The algorithm is also parallelized for application to larger circuits; runtime is decreased by 69% with eight threads.