Abstract

This paper describes a novel technology for producing micron- and submicron gate FET devices with improved gain and noise performances. The technique is particularly attractive for the production of very low-noise devices and is very useful in monolithic circuit fabrication. In the production of high-power devices, the technique has the advantage of not requiring complicated interdigitated structures. A noise figure improvement of 0.4 dB at 10 GHz was achieved using this technology. As an example of the developed technique, a two-stage monolithic preamplifier (2.8-dB NF, 15-dB gain between 11.7 and 12.5 GHz) is described. This amplifier was connected with other monolithic circuits to form a multichip DBS front-end receiver having 43+- 2.5 dB conversion gain and 4-dB NF /sub MAX/.

Full Text
Paper version not known

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call

Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.