AhSpMV: An Autotuning Hybrid Computing Scheme for SpMV on the Sunway Architecture

Abstract

The prevalence of the Internet of Things (IoT) and the explosion of available information on the Web have led to an enormous amount of widely available IoT data sets with sparsity. Sparse matrix–vector multiplication (SpMV) is one of the most essential algorithms in various kinds of IoT applications. This article designs an autotuning hybrid computing scheme for SpMV, named ahSpMV, on the powerful and unique architecture of Sunway TaihuLight supercomputer, to combine the advantages of the heterogeneous parallel Sunway architecture and the Hybrid (HYB) sparse matrix format and optimize the SpMV’s performance. First, we propose a heterogeneous parallelization design for ahSpMV based on the heterogeneous manycore architecture of the SW26010 of Sunway TaihuLight and the hybrid feature of the HYB format. Second, we propose several optimization techniques for computation and communication of ahSpMV, to fully utilize the computing power of Sunway. Third, we analyze the execution time of ahSpMV on Sunway. Fourth, based on the performance analysis, we propose an autotuning scheme for ahSpMV to set the proper parameter for the HYB format. We evaluate ahSpMV’s performance on the Sunway architecture. The result analysis indicates that ahSpMV has obvious performance improvement over parallel SpMV based on other related sparse matrix formats. The optimization techniques and the autotuning scheme for ahSpMV also yield expected optimization effects. Moreover, the experimental results illustrate that ahSpMV has good scalability on the Sunway architecture.