Aging comparative analysis of high-performance FinFET and CMOS flip-flops

Abstract

This paper presents a comparative performance analysis to investigate the impact of aging mechanisms on various flip-flops in CMOS and FinFET technologies. We consider Bias Temperature Instability (BTI) and Hot Carrier Injection (HCI) effects on the robustness of high performance flip-flops. To apply BTI and HCI aging mechanisms, we utilize long-term model to estimate ∆Vth and employ the updated Vth in transistor model file. The simulation results on performance analysis indicate the high ranking of various flip-flops considering speed and power consumption in each CMOS and FinFET technologies, moreover, approve the superiority of static FinFET flip-flops over CMOS flip-flops. In addition, a comparative analysis considering temperature and VDD variations over different FinFET flip-flop structures demonstrates the average percentages of TDQmin and PDP degradation against aging mechanisms are significantly less than similar CMOS flip-flops.