Abstract

This paper describes a novel alternative to trace scheduling and other global scheduling techniques that attempt to boost instruction level parallelism by moving operations beyond basic block boundaries. We quantify the relative benefits of moving operations from one basic block to another with respect to critical path length, register pressure, and avoiding interlocks from long-latency operations. The benefits are encoded as flow capacities in a network, and a mincut algorithm is used to select the set of operations to move. Unlike other approaches, our method is applied before register allocation and scheduling. Our experiments on a superscalar processor show that significant speedup can be obtained for both integer and floating-point benchmarks using this method, even in the presence of an excellent software pipeliner.

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