Advances in the IBM z13 I/O function and capability

Abstract

The IBM z13™ introduces a number of significant improvements in the I/O subsystem relative to the IBM zEnterprise™ EC12. This includes advancing the I/O drawer infrastructure to implement generation 3 (Gen 3) of the Peripheral Component Interconnect Express® (PCIe®) links and switches. For the first time on this platform, the PCIe ports are placed directly within the IBM z13 processor itself, reducing latency by avoiding the necessity of using hub chips that have traditionally been implemented for routing and expansion of the PCIe infrastructure. Portions of the processor chip have been reserved to implement the functionality that would previously have resided on these separate hub chips. Traditional I/O features such as Fiber Connection (FICON®), Fibre Channel Protocol (FCP), Open System Adapter (OSA), Crypto Express, and Flash Express are provided with enhanced functionality in the PCIe I/O drawer. The PCIe infrastructure has created the opportunity to integrate additional native PCI adapters. This is further exploited with the use of Single Root I/O virtualization (SR-IOV) capability on a Remote Direct Memory Access over Converged Ethernet (RoCE) Express adapter, which now provides shared exploitation of the facilities within this adapter. An adapter utilizing field programmable gate arrays has been developed to provide compression acceleration in the z13 and forms a foundation for additional varieties of acceleration in the future.