Abstract
This paper reviews the studies on La-based high-k dielectrics for metal-oxide-semiconductor (MOS) applications in recent years. According to the analyses of the physical and chemical characteristics of La2O3, its hygroscopicity and defects (oxygen vacancies, oxygen interstitials, interface states, and grain boundary states) are the main problems for high-performance devices. Reports show that post-deposition treatments (high temperature, laser), nitrogen incorporation and doping by other high-k material are capable of solving these problems. On the other hand, doping La into other high-k oxides can effectively passivate their oxygen vacancies and improve the threshold voltages of relevant MOS devices, thus improving the device performance. Investigations on MOS devices including non-volatile memory, MOS field-effect transistor, thin-film transistor, and novel devices (FinFET and nanowire-based transistor) suggest that La-based high-k dielectrics have high potential to fulfill the high-performance requirements in future MOS applications.
Highlights
As the complementary metal-oxide-semiconductor (CMOS) technology is continually approaching the giga-scale in terms of integration level, the MOS devices have to be scaled to the nano-scale
La-based high-k materials totoimprove the performance of devices for for making good improve the performance of devices making good use of La-based high-k materials to improve the performance of MOS devices for for meeting the the requirements requirementsof ofthe thetechnology technologynodes nodesininthe thefuture, future,this this review focuses on the advances meeting review focuses on the advances of meeting the requirements of the technology nodes in the future, this review focuses on the advances of
HfLaO was the first La-based high-k dielectric investigated for IGZO Thin-film Transistors (TFTs) in 2009 and achieved low Vth (0.22 V), small subthreshold swing (SS) (76 mV/dec), high carrier mobility (25 cm2 /Vs), and large Ion /Ioff ratio (5 × 107 ), which was the best performance among devices with other high-k gate dielectrics (e.g. Y2 O3, Si3 N4, AlTiO) [113]
Summary
As the complementary metal-oxide-semiconductor (CMOS) technology is continually approaching the giga-scale in terms of integration level, the MOS devices have to be scaled to the nano-scale. For SiO2 dielectrics thinner than 3 nm, the gate leakage is too large for applications because direct tunneling of charge carriers occurs [3,4]. Direct tunneling has the closest relation with the thickness of the gate dielectric, and its current can be calculated as:. 2007, and so novel high-k materials as gate dielectrics had to be had to be explored. Its low k value limits its further an excellent gate dielectric for TFT [21]. Rare-earth oxide oxideas asaahigh-k high-kdielectric dielectric has been studied, O3a is a representative. The direct tunneling currents of ideal structures with dielectrics were modeled and simulated by. In different dielectrics were modeled and simulated by Significant gate leakage decrease is achieved byisreplacing with high-k among which.
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