Advanced verification by automatic property generation

Abstract

Property checking is a promising approach to prove the correctness of today's complex designs. However, in practice this requires the formulation of formal properties, which is a time consuming and non-trivial task. Therefore, the acceptance and efficiency of formal verification techniques is increased by an automated support for formulating design properties. The authors propose a new methodology to automatically generate complex properties for a given design. The tool ‘Dianosis’ (Dynamic Invariant Analysis on Simulation Traces) implements this methodology by analysing a simulation trace and extracting properties. Complex properties describe the abstract design behaviour and improve design understanding, for example by discussing them with the particular designers or reflecting them to the specification. The properties are presented in a format that is easy to read and they can be used as a basis for the application of formal or assertion-based verification techniques. We provide experimental results on industrial hardware designs that show the effectiveness of ‘Dianosis’ and motivate the practical use.