Advanced Traffic Light Controller System Using FPGA Implementation

Abstract

Abstract: The people’s population, and the vehicles which travels on the roads are increasing in our day today life, the traffic congestion is the major problem in major cities. The major reasons behind the traffic issue is that the inefficiency of the techniques and algorithms which are used in the existing traffic light system which are unable to adapt to the continuous traffic situation and eventually lead to traffic congestion. Therefore, to prevent these situations we introduces an advance system which are able to improve the current traffic control. In this project, an FPGA based Smart Traffic Light Control System (STLCS) is proposed with number of vehicles which are further used to calculate the proper time for control of signal lights by using the timing algorithms. Once the timer limit is reached, then the other light turns ON and the request signal is fed to the FPGA, to calculate the signal for the next turn, these processes are done repeatedly. Moreover, a precautionary measure has a maximum and minimum green light timer which are fixed within the timing algorithm to prevent the vehicle detection error, and the waiting of vehicles in queue in other lanes. In this project, ISim software are used to simulate the traffic light controller system that are written in Verilog Hardware Description Language (HDL).