Abstract
Silicon-on-insulator (SOI) technology improves the performance of devices by reducing parasitic capacitance. Devices based on SOI or silicon-on-sapphire technology are primarily used in high-performance radio frequency (RF) and radiation sensitive applications as well as for reducing the short channel effects in microelectronic devices. Despite their advantages, the high substrate cost and overheating problems associated with complexities in substrate fabrication as well as the low thermal conductivity of silicon oxide prevent broad applications of this technology. To overcome these challenges, we describe a new approach of using beryllium oxide (BeO). The use of atomic layer deposition (ALD) for producing this material results in lowering the SOI wafer production cost. Furthermore, the use of BeO exhibiting a high thermal conductivity might minimize the self-heating issues. We show that crystalline Si can be grown on ALD BeO and the resultant devices exhibit potential for use in advanced SOI technology applications.
Highlights
Silicon-on-insulator (SOI) technology improves the performance of devices by reducing parasitic capacitance
After cleaning a Si substrate surface with an aqueous solution of HF (1%) for 1 min, beryllium oxide (BeO) was deposited on Si (100) at 250 °C employing atomic layer deposition (ALD) using dimethylberyllium as the precursor
The cross-sectional TEM images show that the BeO film is highly crystalline and the crystal size deduced from the TEM data is in the range of [20–30] nm
Summary
Silicon-on-insulator (SOI) technology improves the performance of devices by reducing parasitic capacitance. Devices based on SOI or silicon-on-sapphire technology are primarily used in highperformance radio frequency (RF) and radiation sensitive applications as well as for reducing the short channel effects in microelectronic devices Despite their advantages, the high substrate cost and overheating problems associated with complexities in substrate fabrication as well as the low thermal conductivity of silicon oxide prevent broad applications of this technology. After removing the second substrate using ion implantation and controlled stripping, Si is formed on the top layer in a controlled manner While this method is effective, the process is complex and the cost of the resultant SOI wafers is typically 6 to 8 times higher than that of the conventional Si wafers.
Sign-in/Register to view highlights & summary Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
