Advanced iterative channel coding schemes: When Shannon meets Moore

Abstract

The continuous demands on increased spectral efficiency, higher throughput, lower latency and lower energy in communication systems imposes large challenges on appropriate channel coding schemes and their efficient hardware implementation. Consequently, channel coding is not only a matter of information theory but also more and more knowledge on efficient parallel hardware architectures and underlying semiconductor technology is required. Finally, a deep understanding of the strong interrelation of code structure, decoding algorithms, communications performance and efficient implementation in state-of-the-art semiconductor technology is mandatory. In this paper, we will highlight this strong interrelation on some advanced iterative channel coding techniques, i.e. turbo codes and LDPC codes and demonstrate challenges and limitations with respect to throughput and latency.