Advanced characterization of Si/Si 1− yC y heterostructures for nMOS devices

Abstract

Si/Si 1− y C y /Si heterostructures for ultra-short gate length (50 nm) metal oxide semiconductor (nMOS) devices were grown by reduced pressure chemical vapor deposition (RP-CVD) and characterized. Low energy secondary ion mass spectrometry (SIMS), high resolution X-ray diffraction (XRD), atomic force microscopy (AFM) and transmission electron microcopy (TEM) were jointly used to build a coherent picture of the physical and electrical properties of the layers. SIMS and XRD measurements indicate that high carbon concentration samples (substitutional C=1.12 at.%) also contain many interstitial carbon atoms (interstitial C=0.45 at.%). We demonstrated by XRD that such Si/Si 1− y C y /Si stacks are stable versus standard thermal anneals. We thus integrated them into a conventional nMOS process. Cross-sectional TEM imaging shows that the resulting heterostructures arc of high crystalline quality, with well defined interfaces. Finally, an in-depth SIMS analysis using either Cs + or O 2 + primary ions of the C, O and B concentration profiles inside such transistors reveals that (i) some C segregation occurs during the growth of the Si cap, generating the presence of C inside the Si cap and SiO 2 gate (ii) C atoms induce a strong reduction of the B diffusion from the anti-punch-through layer underneath, generating highly retrograde doping profiles. All these measurements will help understanding the electrical properties of such ultimate devices.