Advanced 5K-gate bipolar gate array with a 267 ps basic gate delay

Abstract

To improve performance compared with a previously developed 5K-gate gate array, advanced process technology is used. A 47% smaller emitter window opening technique is used which results in an approximately 0.7-/spl mu/m-wide emitter. Furthermore, the speed-up capacitance of the basic nonthreshold logic cell is increased by 33% over that of the earlier gate array. Consequently, a 17% shorter gate delay of 267 ps, a 22-ps fan-out delay, and a 72-ps/mm load wire delay are achieved with under 1 mW power.