Abstract

We propose a novel data detection algorithm and a corresponding VLSI design for large multi-user (MU) multiple-input multiple-output (MIMO) wireless receiver. Our algorithm, referred to as ADMIN, performs alternating direction method of multipliers (ADMM)-based infinity norm constrained equalization. ADMIN is an iterative algorithm that outperforms linear detectors if the number of users is small compared to that of the antennas in base station (BS). ADMIN computes the linear minimum mean-square error (MMSE) solution in the first iteration. It is sufficient when the ratio between the numbers of BS antennas and users is rather large. We develop a time-shared and iterative VLSI architecture for LDL-decomposition based soft-output ADMIN. Our architecture achieves 685.71 Mb/s for linear MMSE and 212.38 Mb/s for ADMIN for a 16-user system that employs 64-QAM in a 28 nm CMOS technology.

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