Abstract
Integrated silicon photonics offers great potential for monolithic integrated photonic and electronic components using existing integrated circuit fabrication infrastructure. However, understanding of the impact of IC process variations on performance of photonic components remains limited. Methods for analysis that identify sensitivity of photonic components to the variety of process variations encountered during fabrication are crucial to enable viable design and manufacturing of silicon photonic systems. We present the application of the adjoint method to predict the impact of different types of particle defects on silicon photonic circuits. The adjoint method is applied for both component and circuit level analysis to reduce computational cost, and shows good consistency with direct simulations. The results for complicated device components and small circuits are shown and discussed. The model and results can be used to help generate layout design rules and critical area extraction methods, and to assist silicon photonics designers in predicting and optimizing yield of complex silicon photonics devices and circuits.
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